Dynamic signatures and their use in comparing the reliability of new and used systems

The signature of a system with independent and identically distributed (i.i.d.) component lifetimes is a vector whose ith element is the probability that the ith component failure is fatal to the system. System signatures have been found to be quite useful tools in the study and comparison of engineered systems. In this article, the theory of system signatures is extended to versions of signatures applicable in dynamic reliability settings. It is shown that, when a working used system is inspected at time t and it is noted that precisely k failures have occurred, the vector s [0,1]^n‐k whose jth element is the probability that the (k + j)th component failure is fatal to the system, for j = 1,2,2026;,n ‐ k, is a distribution‐free measure of the design of the residual system. Next, known representation and preservation theorems for system signatures are generalized to dynamic versions. Two additional applications of dynamic signatures are studied in detail. The well‐known “new better than used” (NBU) property of aging systems is extended to a uniform (UNBU) version, which compares systems when new and when used, conditional on the known number of failures. Sufficient conditions are given for a system to have the UNBU property. The application of dynamic signatures to the engineering practice of “burn‐in” is also treated. Specifically, we consider the comparison of new systems with working used systems burned‐in to a given ordered component failure time. In a reliability economics framework, we illustrate how one might compare a new system to one successfully burned‐in to the kth component failure, and we identify circumstances in which burn‐in is inferior (or is superior) to the fielding of a new system. © 2009 Wiley Periodicals, Inc. Naval Research Logistics, 2009     

基于FPGA的可变速率PSK数字解调器实现

针对QPSK变速率调制数字系统,提出了一种新的基于现场可编程门阵列(FPGA)实现方法,该系统可以支持4.88 Kb/s到2 Mb/s和更高的连续比特速率。设计采用混合乘法器、数控振荡器(NCO)和积分-梳状滤波器(CIC),并给出了系统中载波和信号恢复电路的设计结构,且可以移植到任何FPGA器件。提出的设计在Xilinx Virtex-5 FPGA平台进行了硬件测试。硬件实现结果显示,采用本方法实现的解调器,表现出优越的使用效率。